Historically, engineers have been trained to design circuits in terms of voltage. While analyzing circuits, a designer typically concentrates on the voltage at each node. When doing integrated circuit analysis, designers look at the voltage change on the output due to a voltage change on the Input. Circuit simulators also follow this approach by constructing matrices of nodes to solve for node voltages. On the test bench, voltage sources are used to operate circuits under test, and test equipment measures voltage.
Over the years, integrated circuits have seen incredible increases in density. With each reduction in feature size, there has also been a reduction in optimal operating voltage. These decreases in operating voltage have required reductions in threshold voltages in an attempt to maintain noise margins. Analog circuits, particularly analog-to-digital converters (ADCs) have suffered from this reduction, and are typically designed with higher voltage transistors and operating voltages than are available to digital designers.
In a typical voltage mode ADC, the voltage being sampled is stored on a capacitor. It can be shown that the minimum size of the capacitor storing the voltage must be >kT/(Vn^2), where k is Boltzman's constant, T is temperature in Kelvin, and Vn is the size of the largest noise signal, usually less than ¼ of the ADC's least significant bit (LSB), that can be tolerated to give a low probability of error. As the operating voltage is reduced due to newer processes, the minimum capacitor size increases. This increases both the size of the circuit and the power used.
The accuracy of a voltage mode circuit, including a voltage mode ADC, is determined by the size of the capacitance used to store the voltage. The speed of a voltage mode circuit is consequently affected by circuit capacitance and parasitic capacitance. The nodes of a voltage mode circuit must change voltage during operation of the circuit over a range that is often approximately the entire voltage range of the power supply voltage. Changing the voltage requires that the circuit and parasitic capacitances must charge and discharge. Smaller integrated circuit geometries have been able to reduce circuit capacitance, at the cost of smaller supply voltages, which has a negative impact on noise margins.